Adaptive radios capable of dynamically trading off energy for signal-to-noise ratio (SNR) slack can enable significant power savings, but developing a fully reconfigurable analog front-end, which achieves suitable performance in digital-optimized process technology presents a major challenge to building low-power adaptive radios. Two of the major functions of an analog receiver front-end-blocker include rejection filtering and low-noise amplification for digital CMOS processes. However, a challenge remains to implement these functions while reducing manufacturing cost and leveraging the advantages of high-speed digital process technologies.
For example, mobile communication platforms require multiple radios to operate simultaneously, creating co-existence issues. For example, a Wi-Fi receiver co-existing with an LTE transmitter needs to handle the LTE blocker (i.e., resulting interference signal) and hence needs high linearity to ensure the receiver is not saturated. However, such high linearity receivers consume a significant amount of power, which is disadvantageous for mobile devices that utilize a battery for power.